전체 Analog Digital Communication Processor Memory Etc 제목 주저자 작성일 조회 29 Cyrogenic CMOS LNA in 28nm CMOS Process for Quantum Computing 장웅주 23.05.08 72 28 A 8GHz Phase interpolator based on charge pump with 0.23% Phase Error 장현수 23.05.08 46 27 A Process-scalable Ultra-low-voltage 180kHz Sleep Timer with Time-domain Ampli.. 정종수 23.05.07 34 26 A 9V-Tolerant 71.4%-Efficiency Stacked-Switched-Capacitor Stimulation System w.. Minju Park 23.05.07 42 25 A 28-nm CMOS High PSRR and Stability Low Dropout Regulator Using Feed-Forward .. 김봉수 23.05.05 60 24 도파관 패키징을 위한 InP 250nm 공정 WR-3.4 대역 Detector 설계 고윤경 23.05.04 45 23 Offset-Canceling Current-Latched Sense Amplifier with Slow Rise Time Control a.. Bayartulga Ishdorj 23.05.04 47 22 A Low EMI Transceiver for DRAM Interface with Quadrature Clock Corrector and D.. 이현빈 23.05.03 40 21 A 150MS/s, 65dB SNDR Fully Passive Bandpass Noise-Shaping SAR ADC 이동식 23.05.01 42 20 An Intra-Body Power Transfer System with Dual Maximum Resonant Power Tracking .. Hyungjoo Cho 23.05.01 52 19 Design of High-Efficiency CMOS Radio-Frequency Rectifier for Wirless Power Tra.. SeungHyeon Park 23.04.28 43 18 Integrate and fire neuron circuit 김재성 23.04.28 43 17 Dual-mode wireless charging system with RF energy harvesting Sang Hyun Lee 23.04.26 46 16 A High-Gain Low-Noise Current Sensing System Woo Suk Choi 23.04.26 44 15 An Overlapped-Conversion-Ratio Modulation for Tri-Loop 3-D Reconfigurable SC F.. 김현진 23.04.26 33 14 Design of NRZ/PAM-3 Multi-mode Transmitter for Next-generation Memory Interfaces 최병두 23.04.26 72 13 4-bit Single Slope ADC for Temperature Sensor Back Lee 23.04.26 56 12 An Energy-Efficient Wireless Power and Data Transfer System Yechan Park 23.04.24 59 11 Design of Reconfigurable 12~14-bit Hybrid SAR-SS Analog to Digital Converter .. Cheol-Woo Moon 23.04.24 44 10 Design of A Reconfigurable SAR/SS Analog to Digital Converter with Jump Searc.. Sung-Kwang Oh 23.04.24 44 1 2 3 통합 검색어
