Chip Design Contest(CDC)

A 43.9 us IRS Controller SoC with Grid-Based Phase-Shift Optimization in 28 nm CMOS Technology for Next-Generation Communication

• 논문번호 : 202303008
• 주저자 : Seungsik Moon
• 소속 : POSTECH
• 지도교수 : 이영주
• 전시담당자 : Seungsik Moon(mssik1213@postech.ac.kr)